http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-392112-B

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a79ce330f60bfa81db8ae16dec623d2e
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F15-8023
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-80
filingDate 1994-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2000-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e1bfb459b981c416be48a90764b54099
publicationDate 2000-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-392112-B
titleOfInvention Parallel data processor
abstract A parallel processor has a controller for generating control signals, and a plurality of identical processing cells, each of which is connected to at least one neighboring cell and responsive to the controller for processing data in accordance with the control signals. Each processing cell includes a memory, a first register, a second register, and an arithmetic logic unit (ALU). An input of the first register is coupled to a memory output. The output of the first register is coupled to a second register located in a neighboring cell. An input of the second register is coupled to receive an output from a first register located in a neighboring cell. The output of the second register is coupled to an input of the ALU. In another feature, mask logic is interposed between A and B operand sources, and two inputs of the ALU. The mask logic also inputs a mask source, and in response to control signals, can output the A operand logically OR' ed with the mask, and can output the B operand logically AND' ed with the mask, In another feature, each cell includes a multiplexor coupled to a neighboring cell for selectively transmitting cell data to the neighbor, or for effectively bypassig the cell during data shift operations by transmitting data that is received from a neighboring cell to a neighboring cell. Other enhancements to a cell architecture are also disclosed.
priorityDate 1993-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 16.