http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-388065-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_57341227c065dbddd1d3cf801bbaa86a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 |
| filingDate | 1998-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2000-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6a7b5808cc040f607bb746a85966b046 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ccab9a73a8fd162b89805d4ac8e7f4cb |
| publicationDate | 2000-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-388065-B |
| titleOfInvention | Multi-purpose dummy de-coupling capacitor for replacing inactive logic devices |
| abstract | The present invention includes the first conducting-type well mask formed on the first area of a wafer for defining the first conducting-type well area on the wafer. The first polysilicon mask is formed on the first conducting-type well mask for defining a first polysilicon layer. The first polysilicon layer includes multiple first structures and multiple second structures for defining ploysilicon gates. The first ion-implantation mask is formed on the first polysilicon mask to form a second conducting-type area. The second ion-implantation mask is formed on the first polysilicon mask. The second polysilicon mask is provided to define a second polysilicon layer. The second polysilicon layer is formed between the first conducting-type transistor and the second conducting-type transistor. A contact window mask is formed on the second polysilicon mask. |
| priorityDate | 1998-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 18.