http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-386308-B

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
filingDate 1998-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2000-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1e93a7df8f2d25508ac41da7952f6ac4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fa987e1fc53875f74745cc00518a7012
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publicationDate 2000-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-386308-B
titleOfInvention Method of producing capacitor structure of DRAM device
abstract The present invention provides a method of producing a crown-shape storage node electrode covered with HSG silicon layer to increase the surface area of a high-density DRAM and so as increasing the capacitance. The characteristic of this method is a crown-shape storage node generated from hybrid amorphous silicon. The hybrid amorphous silicon comprises a highly doped amorphous silicon layer for reducing the capacitance depletion phenomena that is between undoped or lightly doped amorphous silicon layers for selectively covering HSG silicon layer. Another characteristic of this method also comprises a pre-cleaning step using hydrofluoric acid vapor, and performing a selective deposition of HSG silicon seeds in a conventional LPCVD furnace tube prior to the annealing step of the HSG silicon layer formation.
priorityDate 1998-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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