| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5db580deca7130dbe51805c6c608b35 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-26 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0805
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1039
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-133
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1072 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-081
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-13
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-407
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-78 |
| filingDate |
1997-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
1997-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c1ccb6ebc4d43df20e9693605922d9c5 |
| publicationDate |
1997-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-323352-B |
| titleOfInvention |
Semiconductor integrated circuit having a DLL circuit and a special power supply circuit for the DLL circuit |
| abstract |
A semiconductor integrated circuit has a DLL circuit for receiving a first control signal and generating a second control signal synchronized with the first control signal by carrying out a phase synchronization process. The semiconductor integrated circuit has a power supply circuit for supplying a power supply voltage only to the DLL circuit. Therefore, the DLL circuit can generate an internal clock which is stable and accurately synchronized with an external clock without including jitters. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I749976-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6882580-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I743254-B |
| priorityDate |
1996-12-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |