| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-55 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8246
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-105
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 |
| filingDate |
1997-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
1997-11-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0b40d6eff99b6e5962c33c0a13832dda
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fc31f24e3a4859f5cfcd0329f54ac130
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5181a63e075fec70f1a89ca154c79d0e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2911322b3981499b7ce13d40f401fed6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d839d5f44beac8d4f046b7505c161052 |
| publicationDate |
1997-11-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-318960-B |
| titleOfInvention |
Structure and fabrication method for non-planar memory elements |
| abstract |
Structures for memory cell applications, including capacitors for DRAM and ferroelectric memory cells from FRAM, whose method of manufacture consists of depositing a ferroelectric or high-epsilon dielectric material to completely fill a cavity whose geometrical width is the sole determinant of the thickness of the electrically active portion of the ferroelectric or high-epsilon dielectric layer in the final device. In the preferred embodiment, the cavity into which the dielectric is deposited is defined by the gap between the plate and stack electrodes which are deposited and patterned in a through-mask plating step prior to the dielectric deposition. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1040518-A1 |
| priorityDate |
1996-04-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |