http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-318953-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-70 |
| filingDate | 1996-06-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 1997-11-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9efa4f7d611dd3dbee2430ff7982e368 |
| publicationDate | 1997-11-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-318953-B |
| titleOfInvention | Eliminating method of capacitor region metal void of integrated circuit |
| abstract | An eliminating method of metal void of multi-layer structure of silicon nitride/metal/silicon nitride of integrated circuit comprises of: (1) on silicon semiconductor substrate forming first silicon nitride; (2) forming one metal, and forming metal pattern; (3) under nitrogen-containing, high-temperature environment performing annealing treatment to the above metal; (4) forming one second silicon nitride. |
| priorityDate | 1996-06-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.