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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8244
filingDate 1996-09-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1997-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_46874f929b369d57f49502f8fe3c62e5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c036c24b7b56436fe31a01c235b32e1e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c61aaa6b84a8dc609a598abcdcd28c8f
publicationDate 1997-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-307907-B
titleOfInvention Manufacturing method of one semiconductor device with high-density quad-transistor static random access memory and logic function
abstract A method of forming local interconnection in SRAM and one self-aligned silicide in logic device on same semiconductor substrate comprises of the steps: (1) supplying one semiconductor substrate in which there forms one MOS transistor, isolated by field insulator, and each transistor includes one gate located under one gate oxide and source and drain region in the substrate, and isolating layer is located on the gate sidewall, and among which the field oxide of those SRAM has polysilicon interconnection, and on which there is sidewall isolating layer; (2) from the polysilicon interconnection removing the sidewall isolating layer; (3) on the semiconductor substrate depositing one Ti layer; (4) on the gate, the source and drain region, and the polysilicon interconnection forming the self-aligned silicide, and in which the local interconnection is formed to connect the polysilicon interconnection to one of the source region.
priorityDate 1996-09-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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