| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7853 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate |
2020-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ec240496bd0da580e10ad399ecc76779
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9c7f07a9a5588eb43aaf93be57b7c064
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c696a40c25531c9dd0a47548c9c56009
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b40b1e8fa45f9f341135d16e03322801
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3c4720acb7be633fda9b53d43241bdab |
| publicationDate |
2021-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-202113941-A |
| titleOfInvention |
Method for forming semiconductor structure |
| abstract |
The present disclosure provides a method of forming a semiconductor structure with a metal gate. The semiconductor structure is formed by first fabricating fins over a semiconductor substrate, followed by a formation of a source and a drain recess. A source and a drain region may then be deposited into the source and the drain recess. The gate structure may be deposited into the region between the fins. The gate structure includes dielectric and metallic layers. In the regions between the fins, the gate structure is isolated from the source and the drain region by an insulating layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I792437-B |
| priorityDate |
2019-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |