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filingDate 2020-04-08-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_44576b61d9d50e6da8b2857adc504b52
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publicationDate 2021-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-202105720-A
titleOfInvention Integrated circuit and the forming method thereof
abstract An integrated circuit includes a first transistor, a second transistor, and a first insulating layer. The first transistor is disposed in a first layer and comprises a first gate. The second transistor is disposed in a second layer above the first layer and comprises a second gate. The first gate and second gate are separated from each other in a first direction. The first insulating layer is disposed between the first gate of the first transistor and the second gate of the second transistor. The first insulating layer is configured to electrically insulate the first gate of the first transistor from the second gate of the second transistor. A forming method of the integrated circuit is disclosed herein.
priorityDate 2019-04-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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