http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-202036914-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f3518dca003902d9f332ad08ac9a6ffe |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7838 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14616 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823456 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14614 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7851 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66757 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14698 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14689 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14612 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-772 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-22 |
filingDate | 2020-02-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_78a4295128360793d25d6eb3fc6f7c4b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b5f534874d254b44d41a9ca288cd7660 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b87b1326e97fbf456176f2989af470a5 |
publicationDate | 2020-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | TW-202036914-A |
titleOfInvention | Semiconductor element, semiconductor device, semiconductor element manufacturing method, and semiconductor device manufacturing method |
abstract | The present invention provides a semiconductor device that can further improve the performance of a semiconductor element having gate electrodes on three sides surrounding a plate-shaped channel region. The semiconductor device includes: a semiconductor layer; a channel region provided on the upper portion of the semiconductor layer; first and second main electrode regions provided on both ends of the channel region in the longitudinal direction of the channel region opposite to each other; and a gate insulating film , Which is arranged on the inner walls of the first and second grooves on the opposite sides of the channel region, and the upper surface of the channel region; and the gate electrode, which has: a first convex portion, which mediates The gate insulating film is embedded in the first trench; the second protrusion is embedded in the second trench through the gate insulating film; and the horizontal part is connected to the upper ends of the first and second protrusions, The parallel gate insulating film is arranged on the upper surface of the channel region; and the depth of the first and second main electrode regions is greater than the depth of the first and second protrusions. |
priorityDate | 2019-03-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.