Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d80f1040809503e54509c871ba828f75 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01022 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02186 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02186 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C16-45553 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C16-045 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C16-45534 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C16-4554 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76846 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0228 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28556 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7682 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C16-402 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02312 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02216 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-764 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C16-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C16-455 |
filingDate |
2019-04-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cbad8440afdbf360dc619cdd060dbd71 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_689900d7af2c1ed0ef64ad1e5228253a |
publicationDate |
2020-01-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-202003900-A |
titleOfInvention |
Method of forming a semiconductor device with air gaps for low capacitance interconnects |
abstract |
A method of fabricating air gaps in advanced semiconductor devices for low capacitance interconnects. The method includes exposing a substrate to a gas pulse sequence to deposit a material that forms an air gap between raised features. |
priorityDate |
2018-04-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |