http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201933354-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ddbd9538efce6e134d471b912946264e |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K5-2472 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3404 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0483 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-147 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M3-07 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-00 |
| filingDate | 2018-12-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b4a81df9ff14a770c1678c525737e477 |
| publicationDate | 2019-08-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201933354-A |
| titleOfInvention | Semiconductor memory device |
| abstract | The invention provides a voltage generating circuit. Compared with the prior art, the voltage generating circuit has a significantly reduced circuit scale. The voltage generating circuit of the present invention includes a charge pump, a resistor, and a current source circuit. The charge pump outputs the boosted voltage to the output node. The resistor is connected between the output node and another output node. The current source circuit has a first current path and a second current path connected in parallel between the other output node and the reference potential. The first current path includes a resistor and a first DAC. The first DAC generates a first constant current corresponding to the voltage generation code. The second current path includes a second DAC. The second DAC generates a second constant current corresponding to a code obtained by generating a code from an inverted voltage. Therefore, the driving voltage obtained by reducing the boost voltage is generated at another output node. |
| priorityDate | 2018-01-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID71464629 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426285521 |
Total number of triples: 22.