| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3c754156d9ab873a2efe5a3990dbf627 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-134372 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136286
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78693
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1244
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-134363 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 |
| filingDate |
2017-12-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bb8a48a5f00c914f0f93d1f1165c97ee
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_239db01a6ee8a09ae863cc606953cf5c |
| publicationDate |
2019-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201926661-A |
| titleOfInvention |
Pixel array substrate |
| abstract |
A pixel array substrate includes a plurality of pixel units. Each pixel unit includes a thin film transistor, a first insulating layer disposed on the thin film transistor, a common electrode disposed on the first insulating layer, a second insulating layer covering the common electrode, and a second insulating layer disposed on the second insulating layer. Pixel electrodes. The first insulating layer has a first through hole. The common electrode has an opening and communicates with the first through hole. The second insulating layer has a second through hole in communication with the opening and the first through hole. The pixel electrode is electrically connected to the thin film transistor through the second through hole, the opening and the first through hole. The two opposite first edges of the first through hole are aligned with the opposite two third edges of the opening. The fourth edge of the opening is not adjacent to the first through hole and the second through hole. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I754349-B |
| priorityDate |
2017-12-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |