| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_31da94917d1067c89f7e22444c88a836 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5256
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76892
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5383
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5384
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76886 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-482
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-52 |
| filingDate |
2017-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_93f2d9e552e718bdc649382dee599598
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_48ddbb95ff86ae94e4016ee13e868067 |
| publicationDate |
2019-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201911504-A |
| titleOfInvention |
Inline structure |
| abstract |
The present invention relates to semiconductor structures, and more particularly to interconnect structures that are connected between different package configurations and methods of fabricating the same. The structure includes an interconnecting wire including a plurality of conductive layers and pillars, and a grid pattern disposed within an insulating material, the plurality of conductive layers being aligned with the pillars to different package configurations; and a control circuit, It provides a signal to the interconnect to connect to a combination of the different package configurations. |
| priorityDate |
2017-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |