http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201820430-A

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publicationDate 2018-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-201820430-A
titleOfInvention Wraparound gate semiconductor structure with adjustable threshold voltage and method of fabricating the same
abstract The present disclosure relates to a method for manufacturing a wrap-around gate device. A semiconductor structure including a plurality of interleaved first semiconductor layers and a plurality of second semiconductor layers is provided. The first semiconductor layer and the second semiconductor layer have different material compositions. The dummy gate stack is formed above the uppermost first semiconductor layer. A first etching process is performed to remove a plurality of portions of the second semiconductor layer, the portions are not disposed under the virtual gate stack, thereby forming a plurality of holes. The first etching process has an etching selectivity between the first semiconductor layer and the second semiconductor layer. Then, a second etching process is performed to enlarge the holes.
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