| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0413
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0291
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0278
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0404
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2230-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-356026
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G5-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3648
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C19-28 |
| filingDate |
2014-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4d9be286624dc55ccecf0a4f6e26e04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7fa2f1cf002f782d6fbf62e9b457795a |
| publicationDate |
2018-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201818395-A |
| titleOfInvention |
Pulse generating circuit and semiconductor device |
| abstract |
Each of the two gate drivers includes a shift register and a multiplexer composed of a single conductive transistor. The two gate drivers are provided on the left and right sides of the pixel portion. The gate lines are alternately connected to the left and right gate drivers every M rows. The shift register includes k first unit circuits connected in series. The multiplexing demultiplexer includes k second unit circuits each receiving a signal from the first unit circuit and connected to each of the M gate lines. The second unit circuit selects one or more wirings outputting an input signal from the first unit circuit from the M gate lines, and outputs a signal from the first unit circuit to the selected wirings. Since the gate signals can be output to the M gate lines from the output of the 1-stage shift register, the width of the shift register can be shortened. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111627390-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11151944-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I709886-B |
| priorityDate |
2013-04-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |