http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201814884-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_31da94917d1067c89f7e22444c88a836 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41741 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0337 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66666 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0332 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5386 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-098 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 |
| filingDate | 2017-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_981638df826b7782b4e7326e582229e0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fb253ed901d7bcabc7fa8ece2be62756 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b4058be1f30dd35b1b8ded56d9a2f176 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_202029e2e8a803a82f4c099b57e7b591 |
| publicationDate | 2018-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201814884-A |
| titleOfInvention | Controlling the length of the self-aligned gate in the vertical transistor replacement gate process |
| abstract | A semiconductor structure comprising a semiconductor substrate, a bottom source/germanium layer of a first vertical transistor above the semiconductor substrate, a vertical channel above the source/germanium layer, and a metal gate covering the vertical channel, The vertical channel has a fixed height relative to the metal gate at an interface with the metal gate. The semiconductor structure also includes a top source/germanium layer over the vertical channel and self-aligned contacts to each of the top and bottom source/germanium layers and the gate. The semiconductor structure can be realized by providing a semiconductor substrate having a bottom source/german layer thereon, forming a vertical channel above the bottom source/germanium layer, forming a dummy gate covering the vertical channel, and surrounding the The top and bottom of the vertical channel form a bottom spacer layer and a top spacer layer, and the remaining central portion of the vertical channel defines a fixed vertical channel height. The method also includes forming a top source/germanium layer over the vertical channel, replacing the dummy gate with a metal gate, and forming a self-aligned source, germanium, and gate contact. |
| priorityDate | 2016-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 30.