| abstract |
According to one aspect of the present invention, a semiconductor device has: a plurality of memory cells MC; a plurality of word lines WL, each of which is coupled to a corresponding one of the plurality of memory cells MC; and a control circuit, which intermittently Monitoring the access to the plurality of word lines WL, storing / erasing some of the captured column addresses in the first number of registers, and detecting comparison to the first time period by comparing with the storage address In response to the first number of accesses to one of the word lines WL. According to the present invention, the access history can be accurately analyzed by a small circuit configuration, and measures can be taken on, for example, a "row hammer" problem. |