| abstract |
A field effect transistor structure includes: a substrate, an internal gate, an insulating layer, a semiconductor strip, a gate dielectric insulating structure, and a gate conductor structure. The inner gate includes a layered portion on the substrate and a wall portion extending from the layered portion. The insulating layer is on the layered portion of the internal gate. The semiconductor strip is located on the wall portion and a portion of the insulating layer, wherein the semiconductor strip includes a source/drain region and a channel region adjacent to the source/drain region. The gate dielectric insulation structure is located on the channel region. The gate conductor structure is located on the gate dielectric insulation structure. |