http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201732874-A

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filingDate 2016-12-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2017-09-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-201732874-A
titleOfInvention Method for improving wafer planarity and bonded wafer assembly manufactured thereby
abstract A method for improving the planarity of a semiconductor wafer and an assembly manufactured by the method. In a preferred embodiment of the method, a compressed PECVD oxide layer (such as SiO2) having a predetermined thickness or pattern is deposited on a second semiconductor wafer having a desired degree of warpage or curvature. On the surface. The thickness or pattern of the deposited oxide layer is determined by the measured warpage or curvature of the semiconductor wafer. The compressed oxide layer induces an offset compressive force on the second surface of the semiconductor wafer to reduce the warpage and the degree of curvature across a major surface of the semiconductor wafer.
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