| abstract |
The present invention provides a thin film transistor array substrate comprising a second conductive layer of a multilayer structure, the second conductive layer being formed as spaced apart source and drain, the second conductive layer comprising: a first sub-layer; a sub-layer on the first sub-layer; a third sub-layer on the second sub-layer; at least one additional sub-layer located in the first sub-layer and the Between the second sub-layers; the first sub-layer, the third sub-layer and the additional sub-layer each comprise a metal oxide material containing indium and zinc; and a groove is formed in the second conductive layer at the source Between the drain and the drain, the recess extends through the first sub-layer, the second sub-layer, the third sub-layer, and the additional sub-layer. |