http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201715576-A

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filingDate 2016-07-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2017-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-201715576-A
titleOfInvention Method for forming interconnects for semiconductor components
abstract A method for forming an interconnect for a semiconductor device includes: forming a lower insulating layer and a lower interconnect on a semiconductor substrate; forming an insulating pattern layer on the lower interconnect by self-assembly; forming on the insulating pattern layer An interlayer insulating layer and a trench mask; forming a preliminary via hole by removing a portion of the interlayer insulating layer so as to be able to expose the insulating pattern layer; forming a trench by etching the interlayer insulating layer by using a trench mask; The insulating pattern layer in the preliminary via hole is selectively etched to form a via hole so as to be able to expose the lower interconnect line; and the trench and the via hole are filled with a conductive material.
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