http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201637140-A

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filingDate 2016-01-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_647425369dbf63aa1fbd5c838dc2094e
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publicationDate 2016-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-201637140-A
titleOfInvention Wiring substrate laminate and method of manufacturing semiconductor device using same
abstract The present invention provides a wiring board laminate which can reduce the thickness of a wiring board and the efficiency of manufacturing a semiconductor device, and a method of manufacturing a semiconductor device using the same. The wiring board laminate includes a support (12), a copper foil layer (20) that is detachably laminated on at least one surface of the support, and a wiring substrate (10) laminated on the copper foil layer (20). The wiring substrate (10) has an external connection terminal (15), one or more wiring layers (22), interlayers provided between the external connection terminals (15) and the wiring layer (22), and interlayer insulation of the multilayer wiring layer (22). The layer (21), the via hole (25), the insulating film (23) provided on the wiring layer of the uppermost layer, and the connection terminal (24) which is a junction with the semiconductor wafer.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109346432-A
priorityDate 2015-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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