| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36f8253f3d0d59bcd9259217d4385d10 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M7-2195
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M1-0048
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-01
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02B70-10 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M1-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0733
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02K11-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M7-217
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M7-2195
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M7-219 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M1-00 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M7-217
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-00 |
| filingDate |
2015-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_194416a3baf0f7346e2d085f21a5250d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_45d2964a8db0e3a7a6d1807ce34dd91d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1a1b73b7647c97b1782c76943cc9d80b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6ce8edf81bf2b81fa2479a3c745a8f8e |
| publicationDate |
2016-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201611507-A |
| titleOfInvention |
Rectifier and rectifier configuration |
| abstract |
A rectifying device includes a power transistor disposed on a single semiconductor die, a gate control circuit, and a capacitor structure. The power transistor includes a source or emitter terminal coupled to the first end of the rectifier device, a drain or collector terminal coupled to the second terminal of the rectifier device, and a gate. The gate control circuit is configured to control one (the) gate voltage of the gate of the power transistor based on at least one parameter, the parameter and at least one of a voltage and a current between the first terminal and the second terminal related. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I762927-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I777913-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I710138-B |
| priorityDate |
2014-09-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |