http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201505375-A

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filingDate 2013-12-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_038b5c038a6c7d9e90facedd51f98d6e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_32fc708e7c0fd654d719cde45df7f965
publicationDate 2015-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-201505375-A
titleOfInvention Clock system, clock integrated circuit, and clock generation method
abstract A clock system for generating a functional clock by receiving a reference clock signal via an aligned position, wherein the functional clock is provided to the functional circuit via the clock path. The clock system includes a low frequency band phase locked loop, a high frequency band phase locked loop, and a delay path. The low band phase locked loop receives the reference clock signal and the feedback clock to provide a filtered clock. The high-band phase-locked loop receives the filtered clock and provides a functional clock, and the high-band phase-locked loop has a feedback input coupled to the output of the high-band phase-locked loop via a local feedback path. The delay path is coupled between the output of the low-band phase-locked loop and the aligned position to provide a feedback clock to the low-band phase-locked loop. The delay path is basically matched to the clock path. The bandwidth of the low-band phase-locked loop and the high-band phase-locked loop are used to reduce input jitter and internal jitter, respectively.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11486911-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I755038-B
priorityDate 2013-07-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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