http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201419768-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-46 |
| filingDate | 2012-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_707f6684e8348b2eac39d2e0d75aa195 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6aeebc642e4eca8df4de7ee0cd853f57 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ca22e5eab39b6d40af37b48cc7a0a420 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f94bfcadeec1a5b430328ec483600554 |
| publicationDate | 2014-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201419768-A |
| titleOfInvention | Asynchronous continuous progressive register analog-like digital converter and operation method thereof |
| abstract | The asynchronous continuous progressive register analog digital converter comprises a clock generator, a logic control unit, a sample and hold circuit, a digital analog converter and a comparator. The clock generator is configured to generate a clock signal. The logic control unit is configured to generate a sample hold clock according to the clock signal. The sample and hold circuit is configured to sample a analog signal according to the sample hold clock to obtain a sample signal and maintain the sample signal. The digital analog converter is operative to generate a reference value based on a digital value transmitted by the logic control unit. The comparator is configured to generate a comparison value according to the sampling signal and the reference value. |
| priorityDate | 2012-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 34.