Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bce787970b69aeb08d159e7c101c9ed7 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-482 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-488 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 |
filingDate |
2013-05-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e7a6d07f48d7aa5b17f19759bd38f047 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_40958370a26d31525d73252177f6d5c8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e84c2cf68162f7d5fcb06b0dca187f51 |
publicationDate |
2014-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-201405713-A |
titleOfInvention |
Method of fabricating a wraparound gate word line for a vertical channel DRAM |
abstract |
A method for fabricating a self-aligned embedded word line in a structure comprising a self-aligned buried bit line, wherein the monolithic structure forms part of a vertical channel DRAM. The materials and processes used can self-align the components of the embedded word lines during the manufacturing process. In addition, the materials and processes used may form individual DRAM cells having embedded bit line widths of 16 nm or less and vertical embedding words of 24 nm or less. The width of the line. |
priorityDate |
2012-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |