http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201248631-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C17-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-173 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C17-16 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02 |
| filingDate | 2011-12-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_404a7cc62e68fd4411507b653358c33d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_583073b629be771d500c8b83df736f1f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_152565b55908b75b603bffdf562328be |
| publicationDate | 2012-12-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201248631-A |
| titleOfInvention | Memory cell using BTI effects in high-k metal gate MOS |
| abstract | Techniques and circuitry are disclosed for implementing non-volatile storage that exploit bias temperature instability (BTI) effects of high-k/metal-gate n-type or p-type metal oxide semiconductor (NMOS or PMOS) transistors. A programmed bitcell of, for example, a memory or programmable logic circuit exhibits a threshold voltage shift resulting from an applied programming bias used to program bitcells. In some cases, applying a first programming bias causes the device to have a first state, and applying a second programming bias causes the device to have a second state that is different than the first state. Programmed bitcells can be erased by applying an opposite polarity stress, and re-programmed through multiple cycles. The bitcell configuration can be used in conjunction with column/row select circuitry and/or readout circuitry, in accordance with some embodiments. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-106067459-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-106067459-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I664635-B |
| priorityDate | 2010-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 37.