| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-403
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1207
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-60
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-70
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 |
| filingDate |
2012-01-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21747acfb77b0d181ab4dff0d66658d4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_78aa83dfb9454443017f3ff090b2314b |
| publicationDate |
2012-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201246463-A |
| titleOfInvention |
Semiconductor device |
| abstract |
A conventional DRAM needs to be refreshed at an interval of several tens of milliseconds to hold data, which results in large power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem. These problems become significant as the memory capacity increases and transistor miniaturization advances. Another problem is that an increase in memory capacity leads to an increase in the area, despite an attempt at integration through advancement of transistor miniaturization. A transistor is provided which includes an oxide semiconductor and has a trench structure including a trench for a gate electrode and a trench for element isolation. In addition, a plurality of memory elements each including the transistor having a trench structure and including an oxide semiconductor is stacked in a semiconductor device, whereby the circuit area of the semiconductor device can be reduced. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I721176-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I739969-B |
| priorityDate |
2011-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |