Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2d83e693be65697a67d59655346d8f95 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31937 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31709 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31725 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-317 |
filingDate |
2011-05-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e7c2d335335c6db88e3295c73a05a8cf |
publicationDate |
2012-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-201245732-A |
titleOfInvention |
Test chip and test system for integrated circuit chip using the same |
abstract |
A test system for an integrated circuit chip including a chip under test, a test chip, and a test equipment. The chip under test receives a test input data and accordingly provides a test output data. The test chip performs at least one of a skew test, a jitter test, and a setup/hold time test on the chip under test by the test input data and determines whether a test result locates within a preset region. The test equipment provides the test input data and inputs the test input data into the chip under test through the test chip. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11506714-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-110275805-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022041154-A1 |
priorityDate |
2011-05-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |