| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1b5a771839d693a5a67b0ca03a80eddd |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66537
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823493
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82345
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7836
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1045
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-36
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7816
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2011-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_998a21d37de11439a25542503136c923
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c735e432d3fa63ec8c767a7685e9be7c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_02dd6a87e29bf2fc65721e6cb87ae20c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f5148debda80a03b9c5ae784d9d77905
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d2005d1b1322bd7610629976b86555ae
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_203f4cb73c33fe1b5acd866e6512ca49 |
| publicationDate |
2012-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201205811-A |
| titleOfInvention |
Advanced transistors with punch through suppression |
| abstract |
An advanced transistor with punch through suppression includes a gate with length Lg, a well doped to have a first concentration of a dopant, and a screening region positioned under the gate and having a second concentration of dopant. The second concentration of dopant may be greater than 5x10<SP>18</SP> dopant atoms per cm<SP>3</SP>. At least one punch through suppression region is disposed under the gate between the screening region and the well. The punch through suppression region has a third concentration of a dopant intermediate between the first concentration and the second concentration of dopant. A bias voltage may be applied to the well region to adjust a threshold voltage of the transistor. |
| priorityDate |
2010-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |