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filingDate 2010-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_75a75bdb7be51a8a5e9b639b3b2e4c41
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publicationDate 2011-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-201140588-A
titleOfInvention Non-volatile memory cell unit
abstract An only-one polysilicon layer non-volatile memory unit cell is disclosed. The non-volatile memory unit cell includes a first N-type transistor pair and a first and a second control gate. The first N-type transistor pair includes a first and a second transistor with same type and connected along a read path. The first and the second transistors have a first floating gate and a second floating gate to serve as charge storage mediums, separately. The first control gate coupled to the first floating gate through a tunneling junction and the second control gate coupled to the second floating gate through the other tunneling junction. A first source/drain junction of the first transistor is coupled to a second source/drain junction of the second transistor and the first source/drain junction and the second source/drain junction are physically isolated from external power supplies.
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priorityDate 2010-05-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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