http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201117370-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_33cf281df1fdf76b7da1bb88a75ba80d |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1259 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K59-131 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78648 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-12 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-32 |
| filingDate | 2010-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9298781cd946a57f7e428620581654be http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fbf799ae33b165330b50a55ef7a0e601 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10a4b3475ae9ece61bb302fb7cc59b2d |
| publicationDate | 2011-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201117370-A |
| titleOfInvention | Array substrate for display device |
| abstract | An array substrate for a display device includes a substrate including a pixel region, a switching region, a driving region and a storage region; a gate line, a data line and a power line over the substrate, the gate and data lines crossing each other to define the pixel region; a switching thin film transistor (TFT) on the substrate and in the switching region, the switching TFT connected to the gate and data lines and including a first gate electrode, a first gate insulating layer on the first gate electrode, a switching active layer of intrinsic polycrystalline silicon on the first gate insulating layer, first and second switching ohmic contact layers contacting the switching active layer, a switching source electrode on the first switching ohmic contact layer, and a switching drain electrode on the second switching ohmic contact layer; a driving TFT on the substrate and in the driving region, the driving TFT connected to the switching TFT and the power line and including a first gate electrode, a second gate insulating layer on the first gate electrode, a driving active layer of intrinsic polycrystalline silicon on the second gate insulating layer, first and second driving ohmic contact layers contacting the driving active layer, a driving source electrode on the first driving ohmic contact layer, and a driving drain electrode on the second driving ohmic contact layer; and a pixel electrode connected to the driving drain electrode and disposed in the pixel region, wherein at least one of the switching and driving TFTs further includes a second gate electrode over the switching active layer or the driving active layer. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I511283-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9178048-B2 |
| priorityDate | 2009-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 45.