http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201101950-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c8401bd1a86a10d5508942a53475fc38 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-124 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-38 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-10 |
| filingDate | 2010-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c11e02ebb09e022c9e940a831d2fe362 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a432b304d1623276061df3826d998f14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_af41f0da55c9f0e9d3fad27fa0e502fb http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9210ada95a4d1ae1eb884706d377f3f1 |
| publicationDate | 2011-01-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201101950-A |
| titleOfInvention | A method of manufacturing a circuit carrier layer and a use of said method for manufacturing a circuit carrier |
| abstract | In order to be able to produce high density circuits on a dielectric substrate wherein the conductor lines of said circuit have a good adhesion to the dielectric substrate surface, a method is provided which comprises the following method steps: (a) providing an auxiliary substrate having two sides, at least one of said sides having an electrically conductive surface; (b) treating at least one of the at least one electrically conductive surface with at least one release layer forming compound, the at least one release layer forming compound being a heterocyclic compound having at least one thiol group, (c) forming a patterned resist coating on at least one of said at least one electrically conductive surface which has been treated with said at least one release layer forming compound, the patterned resist coating having at least one resist opening thereby exposing the electrically conductive surface; (d) forming an electrically conductive pattern in the at least one resist opening by electrodepositing a metal on the exposed electrically conductive surface; (e) embedding each electrically conductive pattern into a dielectric material by forming a respective dielectric material layer on the respective side of the auxiliary substrate; and (f) separating each dielectric material layer comprising the respective embedded electrically conductive pattern and the auxiliary substrate from each other. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-102480846-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103124475-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I583275-B |
| priorityDate | 2009-04-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 55.