| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_82a9e22a923eca64a02a97f0dfb493ed |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F2200-451
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F2200-294
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F2203-45302
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F2203-45386
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F2203-7206 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-45188
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03G1-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F1-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-195
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-211
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03G1-0088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03G1-0029
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F1-223
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-72
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F3-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03F1-3211 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03F1-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03F3-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03F1-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03G3-02 |
| filingDate |
2010-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6dfb6682beff95380f88958371ce8f6a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a63f95de310b46c9e06ef4d40799ceee |
| publicationDate |
2011-01-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201101678-A |
| titleOfInvention |
Amplifier supporting multiple gain modes |
| abstract |
Techniques for designing a low-noise amplifier (LNA) for operation over a wide range of input power levels. In an exemplary embodiment, a first gain path is provided in parallel with a second gain path. The first gain path includes a differential cascode amplifier with inductor source degeneration. The second gain path includes a differential cascode amplifier without inductor source degeneration. The cascode transistors of the gain paths may be selectively biased to enable or disable the first and/or second gain path. By selectively biasing the cascode transistors and input transistors, various combinations of the first and second gain paths may be selected to provide an optimized gain configuration for any input power level. |
| priorityDate |
2009-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |