http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-201037821-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40114 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7881 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115 |
| filingDate | 2010-01-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3224c3bdfc81965402ef4cd0048c1847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ff9f99d453dc6a361bed94318d09d008 |
| publicationDate | 2010-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-201037821-A |
| titleOfInvention | High performance flash memory devices |
| abstract | Disclosed herein is a flash memory device comprising: a wafer; a gate oxide layer disposed upon the wafer; a floating gate disposed upon the gate oxide layer, the wafer, or a combination thereof; the floating gate comprising a flat floating gate portion and a generally rectangular floating gate portion disposed upon selected areas of the flat floating gate portion; a high K dielectric material disposed upon the floating gate; and-a control gate disposed upon the high K dielectric material; wherein the high K dielectric material forms a zigzag pattern coupling the floating gate with the control gate. |
| priorityDate | 2009-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 43.