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filingDate 2009-01-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10602092917134b8cf2c8c68727a6740
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publicationDate 2009-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-200943425-A
titleOfInvention ULSI microwiring member having ruthenium-plating layer on barrier layer
abstract The object of the present invention is to provide an ULSI microwiring member having a seed layer of which especially the coverage of inside wall of a via or trench is sufficient, the film thickness is as uniform even as surface portion and the impurity concentration is small. The other object of the present invention is to provide an ULSI microwiring member of which the ULSI microwiring is formed without generation of void because a seed layer is applied prior to copper plating, an forming method, and a semiconductor wafer formed with the ULSI microwiring. The ULSI microwiring member has a substrate and a ULSI microwiring formed on the substrate. The ULSI microwiring has a barrier layer formed on the substrate and a ruthenium-plating layer formed on the barrier layer. The ruthenium layer is used as a seed layer so as to form copper plating layer.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I718227-B
priorityDate 2008-01-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 30.