http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-200929616-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d78fe473c8a29219129bbc8bb50f6a59 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-14 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02395 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02546 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02543 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-0093 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-14 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L33-00 |
| filingDate | 2008-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1a14840293edd4ec34307b941d5750ed |
| publicationDate | 2009-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-200929616-A |
| titleOfInvention | High-intensity light-emitting diode manufacturing method, light-emitting element substrate and high intensity light-emitting diode |
| abstract | A manufacturing method of a high-intensity light-emitting diode comprising a step of forming a group III-V compound semiconductor as a second current diffusion layer by HVPE growth over a surface from which a GaAs substrate has been eliminated. The step of forming the group III-V compound semiconductor is performed while a III/V ratio of a supplied material gas at an initial part of the formation is set at 3 or higher, and thereafter, the III/V ratio is varied to a relatively lower value. When the growth is started out for forming the second current diffusion layer with the III/V ratio at 3 or higher, a growth temperature is controlled between 550 DEG C and 700 DEG C, and when the III/V ratio is set at 5 or higher, between 550 DEG C and 730 DEG C, both of the temperature ranges being lower than that used during the growth with the relatively lower III/V ratio. The temperature is then increased to the same temperature as that used during the growth with the relatively lower III/V ratio. In this way, it is possible to prevent damages in the grown layer, which occur during the step of epitaxially growing the second current diffusion layer over the surface from which the GaAs substrate has been eliminated, and suppress micropore defects that may occur in an interface at the initial stage of thegrowth. |
| priorityDate | 2007-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 39.