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filingDate 2008-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_875ce7740757c4924a52a66b94294218
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publicationDate 2009-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-200921683-A
titleOfInvention Memory apparatus and method thereof for operating memory
abstract A memory apparatus and a method thereof for operating a memory are provided. The memory apparatus includes a plurality of memory cells, of which each memory cell shares a source/drain region with a neighboring cell. The method applies a compensation electron flow to a source/drain region between two memory cells to provide enough electron flow to program one of the two memory cells even under the circumstances that another memory cell has a greater threshold voltage, such that the dispersion of programming speed of the memory cells is reduced.
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priorityDate 2007-11-06-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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