| abstract |
The invention provides a stackable semiconductor device and a fabrication method thereof, including providing a wafer having a plurality of chips mounted thereon, both the chip and the wafer having an active surface and a non-active surface opposing one another respectively, wherein each chip has a plurality of solder pads formed on the active surface thereof and a groove formed between adjacent chip solder pads to form a first metal layer electrically connecting to the chip solder pad; subsequently thinning the active surface of the wafer to where the groove is located to expose the first metal layer therefrom, and forming a second metal layer on the non-active surface of the wafer for electrically connecting with the first metal layer; and separating the chips to form a plurality of semiconductor devices capable of being stacked thereon. Thereby, the first and second metal layers formed on the active surface and the non-active surface of the semiconductor device can be stacked and connected to constitute a multi-chip stack structure without having to increase the surface area and capable of integrating more chips. Further, the problems known in the prior art of having poor electrical connection, complicated manufacturing process and increased costs as a result of using solder wires and TSV can be avoided. |