http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-200839939-A

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762
filingDate 2007-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8609212ff4cc383f44304215a279b367
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eb519c6ade4307b0acd106520ba3bb7a
publicationDate 2008-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-200839939-A
titleOfInvention Method for minimizing short between pair of deep trench capacitors
abstract A method for minimizing the short between a pair of deep trench capacitors is provided. The method comprises forming a silicon nitride layer in a substrate located between the pair of deep trench capacitors, prior to the formation of a shallow trench isolation between the pair of deep trench capacitors. The formation of the silicon nitride layer can resolve the electrical leakage under the shallow trench isolation located between the pair of deep trench capacitors.
priorityDate 2007-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 22.