http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-200832707-A

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filingDate 2007-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f872c60ee19086d18ea61aefe90c8ff7
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publicationDate 2008-08-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-200832707-A
titleOfInvention Split gate formation with high density plasma (HDP) oxide layer inter-polysilicon insulation layer
abstract The invention discloses method of for manufacturing a trenched semiconductor power device with split gate filing a trench opened in a semiconductor substrate wherein the split gate is separated by an inter-poly insulation layer disposed between a top and a bottom gate segments. The method further includes a step of forming the inter-poly layer by applying a RTP process after a HDP oxide deposition process to bring an etch rate of the HDP oxide layer close to an etch rate of a thermal oxide.
priorityDate 2006-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 25.