abstract |
A semiconductor chip having a solder bump and a method of fabricating the same are provided. Conventionally, when semiconductor packaging is performed through the solder bump, the solder bump is separated from a bonding portion due to a change of temperature, or a crack takes place at the bonding portion. To solve this drawback, the semiconductor chip includes at least one under bump metal (UBM) layer formed on an electrode pad of the semiconductor chip, an adhesion enhance layer (AEL) formed on the UBM layer and having at least one concavo-convex portion on a top surface thereof, and the solder bump formed on the AEL. Thereby, adhesive force between the UBM layer and the solder bump is increased, and thereby the reliability of the semiconductor chip can be improved. Further, it is possible to prevent tin (Sn) in the solder bump from being diffused due to the AEL. |