Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6653 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
filingDate |
2005-03-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1bd033ebae527eaa361072f9d737e7f4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4c0772aa61fe52fda6c31f296e7c3a1e |
publicationDate |
2005-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-200532856-A |
titleOfInvention |
Spacer approach for CMOS device |
abstract |
A semiconductor device having a graded source/drain region for use in CMOS devices is provided. The semiconductor device is formed by utilizing a spacer and a sacrificial spacer as masks. The sacrificial spacer is formed over an etch stop layer, which acts as an etch stop and protects underlying structures from becoming damaged during the etching process. In particular, the present invention may be used, for example, to protect the edge or corner of a shallow trench isolation from becoming damaged during etching. |
priorityDate |
2004-03-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |