Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36d1d9c59848bff6ad5f55923d1290f5 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1203 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-84 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-13 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0629 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0617 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76283 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-84 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-13 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822 |
filingDate |
2004-12-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_35f6b7915b544cc2f04ccd1a872107a2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e00eaa0426ad12cdc914cfda7a3c2bb5 |
publicationDate |
2005-08-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
TW-200525734-A |
titleOfInvention |
Semiconductor device and method of manufacturing the same |
abstract |
Plural trench isolation films (4) are provided with portions of an SOI layer (3) interposed therebetween in a surface of the SOI layer (3) in a resistor region (RR) where a spiral inductor (SI) is to be provided. Resistive element (30) are formed on the trench isolation films (4), respectively. Each of the trench isolation films (4) includes a central portion which passes through the SOI layer (3) and reaches a buried oxide film (2) to include a full-trench isolation structure, and opposite side portions each of which passes through only a portion of the SOI layer (3) and is located on the SOI layer 3 to include a partial-trench isolation structure. Thus, each of the trench isolation films (4) includes a hybrid-trench isolation structure. |
priorityDate |
2003-12-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |