| abstract |
The purpose of the present invention is to realize high-speed in low-voltage operation for a semiconductor device provided with non-volatile memory unit and variable logic unit. The invention is provided with non-volatile memory cell (8), which has rewritable non-volatile memory cell; and variable logic unit (3), which determines logic function based on the definition data composed of logic down-loaded inside multiple memory cell. The non-volatile memory cell is formed on the hypothesis of the separation gate structure of selection MOS transistor (the second MOS type transistor) and the memory MOS transistor (the first MOS type transistor) such that the selection voltage tolerance of gate insulation for the selected MOS transistor is lower than that of the memory MOS transistor, or the gate insulation film of the selection MOS transistor is thinner than that of high voltage-endurance MOS transistor (the fourth MOS transistor). Thus, Gm value of the selection MOS transistor is increased and the read out current can be sufficiently obtained. |