http://rdf.ncbi.nlm.nih.gov/pubchem/patent/SU-1654822-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6720f9cb8c117b2b37e3954771473a28 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-25 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-00 |
| filingDate | 1988-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 1991-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8d0d7d37d7e90fa52f1f3086523b1019 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a22aa57ce03798f80621a134bfe63d27 |
| publicationDate | 1991-06-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | SU-1654822-A1 |
| titleOfInvention | Logic analyzer |
| abstract | The invention relates to computing and can be used in test equipment. The purpose of the invention is to expand the functionality. The logic analyzer contains two buffer registers, two selectors, two memory blocks, a start block, a control block, and a synchronization pulse shaper. The logic analyzer provides control of microprocessor-based systems with multiplexed bus using for the exchange of information between modules cycles of different disordered structure. 3 hp f-ly, 12 ill. |
| priorityDate | 1988-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.