http://rdf.ncbi.nlm.nih.gov/pubchem/patent/SG-182657-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4fb6fd1265b1564c30cf884ba3821960 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L2209-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2221-2129 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L2209-12 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-317 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L9-0861 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F21-73 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31719 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F21-31 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L9-3278 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09C1-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06K19-077 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F21-31 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F21-73 |
| filingDate | 2011-01-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25f5e7a185c0f936d31268694581fc7d |
| publicationDate | 2012-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | SG-182657-A1 |
| titleOfInvention | Integrated silicon circuit comprising a physically non-reproducible function, and method and system for testing such a circuit |
| abstract | INTEGRATED SILICON CIRCUIT COMPRISING A PHYSICALLY NON REPRODUCIBLE FUNCTION, AND METHOD AND SYSTEM FOR TESTING SUCH A CIRCUITThe subject of the invention is a silicon integrated circuit comprising a physically non-copyable function LPUF allowing the generation of a signature specific to said circuit. Said function comprises a ring oscillator composed of a loop (502) traversed by a signal e, said loop being formed of N topologically identical chains of lags (500., 501), connected to one another in series and of an inVersion gate (503), a chain of lags (500, 501) being composed of M delay elements (506, 507) .connected to one another in series. The function also comprises a control module (505) generating Ncontrol words (C1, C2), said words being used to configure the value of the delays introduced by the chains of lags on the signal e traversing them. A. measurement module (504) measures the frequency of the signal at the output of the last chain of lags (501) after the updating of the control words, and means make it possible to deduce from the frequency measurements the bits making up the signature of the circuit.The subjects of the invention are also a method and a system for testing such circuits.Figure 5 |
| priorityDate | 2010-01-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559541 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5461123 |
Total number of triples: 25.