http://rdf.ncbi.nlm.nih.gov/pubchem/patent/MX-9710068-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9fc0a00eab3a757e8324b1e887d7ba97 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-014 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13111 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01082 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01079 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0113 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01078 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15787 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01006 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15311 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-11003 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-035 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01322 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-81801 |
| filingDate | 1997-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 1998-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | MX-9710068-A |
| titleOfInvention | METHOD FOR PACKING AN INTEGRATED CIRCUIT. |
| abstract | Multiplexed bonding of protruding solder to various substrates for mounting an integrated circuit gasket includes placing a semiconductor substrate (312) having protruding solder structures (314) in contact with a ceramic substrate (320) having integrated circuit supports (322, 334), and contacting this structure with ball grid array spheres (352) in order to form a CBGA (360) in a simple flow process. The method includes the steps of providing a semiconductor device having at least one first structure interconnected to the surface of the semiconductor device (501), and a substrate having a plurality of metallized supports (503); placing at least a second interconnected structure in aligned contact with one or more of the plurality of metallized supports (505); placing at least a first interconnected structure in aligned contact with one or more of the plurality of metallized supports (507); and simultaneously refluxing at least a first interconnected structure and at least a second interconnected structure, so that the semiconductor device and at least a second interconnected structure are connected to the metallized supports of the substrate (509). |
| priorityDate | 1997-01-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Total number of triples: 25.