http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20210081226-A

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filingDate 2020-09-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_97d033f17d52bc47853210bb485ea200
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publicationDate 2021-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20210081226-A
titleOfInvention Embedded die architecture and method of making
abstract Various examples provide a semiconductor package. A semiconductor package includes a substrate having first and second opposed substantially planar major surfaces extending in an x-y direction. The package further includes a bridge die having third and fourth opposed substantially planar major surfaces extending in the x-y direction. The third substantially planar major surface of the bridge die is in direct contact with the second substantially planar major surface of the substrate. The semiconductor package further includes a through silicon via extending in the z-direction through a first substantially planar major surface of the substrate and a fourth substantially planar major surface of the bridge die. The semiconductor package further includes a power source coupled to the through silicon via, a first electronic component electronically coupled to the bridge die, and a second electronic component electronically coupled to the bridge die. The semiconductor package further includes an over mold at least partially surrounding the first electronic component, the second electronic component, and the bridge die.
priorityDate 2019-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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